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Okay! After a bit of a hiatus due to procrastinating on the Quadra 660AV 2 MB VRAM mod, I have completed a draft for the sort of low-level driver that allows the Mac to talk to the WiFi card. This solves the issue I was having with the wifi driver... how do I send management commands for listing...

I don’t think so. 610/650/800 share a chipset but I think the video controller only supports two 128kx32 VRAM banks for a total of 1 MB VRAM. The key with the mod is that the 660AV comes with 1 MB VRAM in two banks but the chipset supports four banks, as is the case on the 840AV. Since Apple...

Nah, it's probably not possible.The pinout of the 128kx8 and 256kx8 chips differ ever so slightly but even ignoring that, the CIVIC probably can't utilize a larger VRAM chip. It would have to multiplex another column bit onto the RAM address bus and I don't think it does that. It's got another...

Mod successfully completed! Here's the mod wires from the extra VRAM to the CIVIC chip: Very nice of Apple to put the requisite series termination resistors and connect them to the CIVIC! I thought Garrett would have to put em inline with the mod wire and solder directly to the CIVIC itself...

Unfortunately no because we have to connect the second set of VRAMs to the motherboard like so: Indeed this is only possible because the CIVIC video chip of the Quadra 660AV is also used in the Quadra 840AV. The 840AV has 1 MB of onboard VRAM and the possibility to add another 1 MB in...

Interestingly, there are a lot of good tidbits in the NetBurst/Pentium 4 architecture. I guess they had to use a lot of tricks to make what turned out to be a bad architecture performant enough lol. I have been trying to get through "The Unabridged Pentium 4" but it's very boring lol despite the...

A little bit more progress: It’s working like this with the RAS and SE pins tied to 5V (i.e. inactive)! Of course there’s no extra VRAM like that. Just gotta solder the wires to the CIVIC and we’re good to test the 2 MB capacity! Will do this later tonight or tomorrow

Yeah, putting an '030 on is sort of a complexity issue but not one of necessary complexity. I could basically swap out the 68HC000 for a 68030 in this design with very few changes. The capabilities of 68030 are much higher than 68000 but only if the processor is kept well-fed by the memory...

Okay as I said, in most operations the SE/30 has the edge but here's an interesting case where the WarpSE oughta be about 2x faster than the SE/30. I didn't think this could be true but now I have found a case where it is. Referring to line 481 in BitBlt.a in the QuickDraw source code: COPY32...

Yes, it won’t be quite as fast as the SE/30. Maybe 3/4 as fast. Theoretically (i.e. at peak), 68030 is a lot faster than 68000. Ignoring the difference in MHz, ‘030 can execute an instruction in just two clock cycles as opposed to four for the 68000. ‘030 can also work with 32 bits of data at...

Finally we got around to putting some of the VRAMs on. First attempt a few months ago was a failure and we lifted a pad so I was kinda discouraged. Garrett fixed that and put half of the VRAM stacks on. (Pic attached.) The rest are going on tomorrow and then I’ll test it out. First test will be...

Better update speeds! For programming only, not verifying, it takes only 3 minutes and 48 seconds: Verifying is still the same speed, 21 minutes, so the total to program and verify is like 25 minutes: Okay enough with the update system. Booooringggg! But very useful of course. My next post...

I have succeeded in making the update program recognize the chip on the unrelated commodore gizmo and reflash it! Here's a shot of the output of the update program recognizing the FPGA: And the update completes as expected: :) So it took 8 minutes and 40 seconds at a speed of 380 bits per...

Good to hear! Soon I will make a batch of 50 or so. Just gotta find the RAM chips... somehow I misplaced em...

Okay! I have mostly confirmed proper operation of the update system on the unrelated Commodore 64 gizmo: Here I've got the unrelated Commodore 64 gizmo hooked up to my MacBook which is running the update software in emulated Windows 7: Above this on the shelf I have an oscilloscope which is...

Yeah, I should probably go over it in the manual but I think it would be good to have some minimal description on the board if it's not too verbose or confusing. That way you won't have to refer to the manual to just make a quick change to the settings. As for the third switch, it's "insurance"...

Since a month ago I have slightly revised the update system so that now we can hopefully achieve 1 kbit/sec, double the previous rate. The change is basically to use the TXD pin of the serial port to send out the clock. I can send a character that has an on-the-wire representation that's a...

Update on the project: @Garrett has assembled the board but unfortunately there is an error in the schematic. :( The specific issue is that the /WE and /RAS signals have been switched on the main connector, plus the /CAS signals were jumbled up too. Oops... Okay well new boards are on the way...

Yeah, the machine will definitely be slower in some cases and I would not make this modification if I was interested in obtaining the maximum speed. My motivation was just curiosity. As for benchmarking, I am pretty skeptical of the sort of "semi-synthetic" benchmarks that are often used on...

I finished my draft of the update program and it seems pretty good. It plays an XSVF file onto the CPLD’s JTAG port using libxsvf. Now the sort of mediocre part is that the update speed is about 500 bits per second and the size of the overall update is more than 100,000 bits so it may take like...