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If the base is 350x350 then that's 495 mm diagonal. Of course, a 495 mm long rectangle could only have a thickness of 0 in that case. So I googled this: "thickest rectangle 450 mm in length that can fit in a 350x350 square" it says 𝟒𝟒.𝟗𝟕 𝐦 I did not verify the math.

Can you right click the bad icon and do "Open image in new tab"? You can copy the url using something like "Copy image address"? The first missing icon (top row, 4th column) has a url like this...

Makes sense. I have a dump of that one. You wrote v3.0.2f but I think it's 3.0.f2. The ROM dump has 13f2 which I take to mean 3.1.3f2 but I'm not sure about stuff before 3.2.4. See "List of Open Firmware versions" at...

Right. USB booting wasn't added to Open Firmware until 3.2.4f1. Backporting this would be difficult but not impossible. What's the "built on" date/time for your Open Firmware version? Open Firmware versions were strange prior to 3.2... I created patches for Beige G3 to support LBA-48 in Open...

I used Jasik's MacNosy to disassemble the "mace" container from the Apple Enet 2.4.5 extension. I made a script to dump the string tables from the .asm file. The property name PLSCCPort is at offset $7C1 in the string list global glob72 in AppleEnet.asm (the .list file disagrees on global...

Real floppy drive is too deep. If you're going to include one, Have the opening on the side (like iMac CD ROM). The front floppy slot can have other stuff - SD card(s)? https://tinkerdifferent.com/threads/the-apple-lisa-inside-an-fpga.5292/post-46958 Is the ESFLOPPY SD a separate device from...

I think one of the goals is to be able to use the 68K driver unmodified without having to write a new driver. This driver is on disk or in a ROM on the card?

I suppose one could take a video of the display to see if the raster is horizontal or not. It must be horizontal according to the timing info posted at https://68kmla.org/bb/threads/page-buffer-capture-from-radius-fpd-se-vram-input-first-baby-step-to-cloning-card.52646/post-594899 57.283 MHz...

An owner of a thread can delete the work of others by deleting their thread? That seems wrong.

Disconnecting data bits is one way to determine order of the bits. We know the order of the bits as seen by the Mac CPU side: big endian with the most significant bit being the left most pixel. Disconnect a bit on the VRAM. Try to set or clear all the bits. Read back the result. The stuck bit is...

The CPU is a 68K CPU. QuickDraw will use 68K CPU instructions such as MOVE or MOVEM to read and write pixels from and to VRAM for scrolling, or for drawing icons or windows and the mouse cursor. Are you thinking that the Mac has a framebuffer that is separate from the framebuffer of the Radius...

Does the Radius FPD/SE provide a vertical blanking interrupt?

Random access input and the serial output are both 16 bits wide. Figuring out data order of one will determine the order of the other. Can you map the PDS data lines to the VRAM input lines? That will tell you the order of the bits. But you said there's a GAL between the PDS and VRAM so...

I expect SOE to be tied together - that's an input. SO0 - SO3 are outputs and are probably used for the output raster. That's how most VRAM works - there's a random access port from the CPU and a serial read port for rasterizing. Or do you think rasterizing is using normal read cycles...

I had some comments/questions in the corresponding 68kMLA thread but it's not been accessible the past couple of days... I guess I'll re-ask one of the questions here. Why is SO0 of the 4 VRAM chips tied together...

Here's options for my fork of DingusPPC to allow the 1995-08 - 9630C68B - Power Mac 7200&7500&8500&9500 v2, SuperMac S900 ROM to detect bank sizes of 128 and 256 MiB for DIMMs that are 256 and 512 MiB. --comment "allow 512 MB DIMMs for 7200 v2 ROM" \ --patch FFF04538=54A4E054 \ --patch...

The algorithm for Hammerhead is different than for Platinum. Platinum Bank Base registers support addresses with this mask: 0x7FE00000 - 2 MiB resolution < 2 GIB. Hammerhead base address registers support addresses with this mask: 0x7FC00000 - 4 MiB resolution < 2 GiB. The algorithm for...

Maybe the hardware allows it. I don't think the ROM HWInit memory detection routines for Platinum might not. I've attached startup trace from DingusPPC. Ignore the sound DMA which is happening in another thread to play the boot chime while the RAM is being checked (the boot chime is played by a...

Here's the Platinum ERS.

On the DingusPPC Discord, you can find some memory controller documentation. Search for these: filename:Platinum_ERS_1.0.pdf filename:Hammerhead_ERS_Rev_1.1_19950925.pdf