Recent content by joevt

Another note: "Flasher (TNT 0.6)" doesn't try to detect the ROM type before flashing. It says AMD for both AMD and Intel chips. "Flasher (TNT 0.6)" has direct drawing to the screen to show a progress bar - vertically oriented. 480 lines tall, 80 bytes wide. It fills up for each stage of the...

It appears that "Flasher (TNT 0.6)" cannot do Intel 28F020 chips because it's looking for a device ID of DB instead of BD from 8 of the chips. AM28F020.PDF has device ID 2A. It describes non-embedded erasing/programming commands (20h, A0h, 40h, C0h). AM28F020A.PDF has device ID 29. It describes...

In your screenshot, the first 4 bytes of the framebuffer is 07FFFFFF hex. That is 5 zero bits (black pixels) followed by 27 one bits (white pixels). The second line is 1FFFFFFF. The third line is the same as the second line but it should be 3FFFFFFF. The fourth and 5th lines begin with 5F but...

The first line begins at offset 0 of the frame buffer. The most significant bit (bit 7) of the fist byte is the top left pixel. 32 bits is 4 bytes. The most significant bit of a 4 byte value is bit 31 (left edge) and the bits count down to 0 (right edge). Check continuity between the date lines...

You're not viewing that screenshot on the same computer that took the screen shot? Can you post a copy here (convert to png using QuickTime or something).

I think so. Looks like line 29 of one of the 32-bit buses. Maybe post the screenshot here so we can count the pixels. If the problem was with CPU and RAM, then you wouldn't be able to boot. PD[31:0], PDf[31:0] are on the output side of the VRAM, so look at BDb[31:0] which is probably the input...

Right. There's some code that chooses between different Erase and Program methods. My emulation return 01/2A as manufacturer / device IDs so I don't know why the code would use the 30h command for erase.

PDf[31:0] at U8 in the Quadra 800 schematics? https://68kmla.org/bb/index.php?threads/centris-quadra-650-800-behaviour-when-leds-are-fitted.46961/post-525870 If it's not the traces, then it could be U8 itself?

I would have to look at a schematic to know the actual names of the signals/traces. Can you take a screenshot? If the problem is not captured in the screen shot, then the problem is not between the CPU and the VRAM or in the VRAM - it is between the VRAM and the display output.

Color fringing seems excessive. A white horizontal line should ideally not have color fringing at either end (unless a line or bit exists within 2 bits of the edge of the line), though I don't know if that's possible with analog circuitry or simulation. The output of the Apple II is digital...

Does this GPU have a black and white mode? That may help identify what bits or bytes or words are bad.

The B&W image indicates a 32-bit bus with D29 or D28 being stuck low.

What is 28F020 command 30h? I don't see it in the Intel or AMD data sheets. Do flashable ROM SIMMs have extra logic to catch this command?

What color depth is being used in the photo? Change it to B&W so we can see which VRAM data lines are broken.

Did Apple reverse the order of the data bits for 8 of the 16 Am28F020 chips? i.e. D0-D7 -> D7 D0?