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The Conner doesn't have anything special for termination, just pull-up resistors connected to the SCSI +5V.

Since they are 8-bit chips on a 16-bit bus, the two chips will be in the same address range. The error result it gives should be the bad bits. Convert the first four characters of the result from hexadecimal to binary, and the 1s will represent bad bits, starting from bit 0 on the right.

Assuming you're on the M5120, you're currently testing 8 chips at a time. You may need to test smaller ranges. Here is a table of memory ranges for the 32 RAM chips. Note the repeating values because B through E are for the low byte and F through J for the high byte. 1 2 3 4 B 00000000 -...

If I recall correctly the Portable uses the voltage drop through the charge MOSFET to determine when the charger is connected. It compares the charger side voltage with the battery side voltage, and if the charger side is higher then the power adapter must be connected. So for example, with just...

That would be the trace connecting the 1.2V reference to pretty much everything else. Here's what I have documented for RP201:

Error 14 is unfortunately the very first test/error that you can get, so it's hard to say what else might not be working, but getting to that point means many things are working at least. Since you're not always getting that far I would suspect some sort of power issue. Start with the most...

It wouldn't necessarily have to be a ROM patch, as you would have to find a point to insert the instruction. Ideally you'd want it to run when system resumes from sleep but not more than once, and I think patches only run when the OS is running. A regular extension of some sort might be easier.

There's a few different ways you could do it, simplest would be changing the command from "sound on, clear latch" to just "sound on". In ResEdit for example change 2B from 03 to 01:

The RAM speed issue is due to a DTACK register not being accessed when the system wakes from sleep. The last 4MB of RAM from 4MB-9MB is run differently due an unreleased expansion card system, and if that register is not accessed after the CPU GLU is reset then the DTACK delay will be much...

I think I see what's doing it in the Portable Control Panel 1.3. Included are two ROM patches, one replacing the BatWatch VBL task and one for the SndWatch VBL task I posted earlier. I believe the BatWatch patch is to add dimming of the backlight when the battery is low and a new message for...

The registers aren't really documented anywhere. I believe that bit switches between PWM and analog output on the ASC, but as you see the analog is not connected to anything at all. There was also a thought I had on the ripple from the 12V regulator. The design guide for the LT1070 recommends...

MicroBug is a much more basic version of MacsBug, I believe it is either built in to the ROM or the OS. It looks like this:

One thing you can experiment with as well with a debugger (you should at least have MicroBug included) is disabling the output on the Apple Sound Chip. Hit the programmer/interrupt button and type SM FB0802 1, then see if you notice a difference in the noise levels.

I tried booting from that same French MacTest Portable disk on mine and seem to have the exact same sound every 10 seconds. Yet if I boot from a System 6.0.8 "System Tools" disk that sound does not occur.

Well as to "normal" if my guess as of the cause is correct I would say "yes, but also no". Take a look at the SndWatch VBL task from the Macintosh Portable ROM: SndWatch: movea.l PowerMgrVars,A2 lea (SwVBLTask,A2),A0 move.w #600,(vblCount,A0)...

On the M5126, the source and drain pins of Q5 are directly connected, so +12V is always supplied, and Q5 would be pretty useless. My guess was they decided that being able to turn off the sound wasn't necessary, like many other questionable decisions they made when making the M5126. As to...

A simple program/interface could probably written, and then run on basically anything with serial hardware. I suppose you could even do it from a smartphone. You can actually do quite a lot from that interface. Besides running the various hardware tests, you can dump memory, execute code, and...

The test has marked the upper byte (bits 8-15) of RAM as bad, so it could be any of the chips in the lower half. While it could be a combination of bits on multiple chips (for example 3 bad bits on one chip and 5 bad bits on another), it's more likely one or more chips are bad or failing to...

Assuming the select lines are connected in order, that range would match 4 chips, but since the error is in the lower byte the two chips for that range should be U4B and U1C.

*0 loads the starting memory address and *1 the end. If you try testing RAM on two different ranges, for example 00000000-0003FFFF and 00040000-0007FFFF, and you get the same error in both, then either bit 4 is bad on multiple chips or there is an issue with bit 4 across all of the RAM.