Macintosh SE - Discrete logic GLU replacement

Kai Robinson

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After Porchy from Jammaarcade got us across the finish line with reverse engineering the original HAL16L8, i thought the functions might be possible to replicate using discrete logic.

This would of course be to benefit those that are making an SE Reloaded board, who don't want to, or can't salvage their GLU chip, and don't have the tools to program an ATF16V8 with the .jed that was reverse engineered.

Of course, this may require some very, very tiny fiddly parts...

Diving deeper into the 'Inside Macintosh' tomes, I actually came across a selection of diagrams that detail exactly what the GLU does, in terms of functionality.

Screenshot 2021-02-12 at 11.19.49 pm.png


Screenshot 2021-02-12 at 11.20.05 pm.png


Screenshot 2021-02-12 at 11.21.39 pm.png


Screenshot 2021-02-12 at 11.25.42 pm.png


Now, this looks pretty simple to me - it's literally just a few tri-state buffers and some inverters. Basically, the HAL that apple had made, essentially smashes a 74LS04 and two 74LS125's together, to save on chip count and extra signal routing.

So I fired up KiCAD and spent about an hour hammering this out:

Screenshot 2022-02-20 at 12.33.05 am.png


And then routed it into a 4-layer PCB, specifying VQFN parts, that sit inside the footprint of the original HAL16L8!

GLU Replacement.jpg


Now, this is using VQFN-14 & SOT-353 parts that are approximately 3mm square at their largest.

U1 is a 74AHCT04
U2 is a 74AHCT125
U3 is a 74LVC1G125 (a single gate of an LS125 in it's own package)

No voltage regulation needed as the parts are rated for 5v operation. I've yet to do a run of these just yet. I'm wondering if i should add additional decoupling capacitors to the design, or if the single decoupling cap designed for the original GLU will suffice.

Also - i think i might need someone to double check my schematic before i'm happy to send a few of these to manufacturing.

When the Macintosh Classic came out, because it dropped the 2nd floppy drive along with the widespread adoption of SMD components, the functionality could be replicated by discrete logic rather than using a HAL/PAL.

Instead, the Classic used a single 74LS368 and the 74LS04 was omitted for the clock signal entirely, with the oscillator feeding directly into the BBU without first being buffered - cost savings at work there!
 

Melkhior

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Are the design files available somewhere ? Easier to read and check the pinouts than with pictures,; e.g. you can 'search' for signals.

Mu first reaction is - where does 'IRQ' come from in U1C ? '_IRQ' is used everywhere else, including the pin on U4 (as a side-note, /IRQ or ~IRQ would be more readable IMHO for an active-low signal). From the schematics, I guess that the U4 pin is 'IRQ' and it only becomes '/IRQ' after U1C.
 

Kai Robinson

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@Melkhior Excellent question, i wondered that myself - but then i saw that IRQ is fed in by the 53C80 SCSI chip to GLU PIN 3 - i now realised i made a boo-boo by naming that one /IRQ or _IRQ in KiCAD. should just be IRQ, with the /IRQ being purely internal between gates...see, this is helping already! 😂
 

JDW

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I'm wondering if i should add additional decoupling capacitors to the design, or if the single decoupling cap designed for the original GLU will suffice.
Not sure if you've built and tested it since your post in Feb. this year, but the following blurb from the U3 chip's data sheet indicates that either a 0.1uF or 0.01uF or 0.022uF cap would be a very good idea.

1653197443768.png


If U1 is closest to the Vcc pin, then it won't need another decoupling cap. But U2 and U3 seem to have more trace length (and therefore a tad more resistance) between them and the Vcc pin, so a decoupling cap on each might be a good idea. A 0.022uF on each might be the idea size, in fact.