Memory Morass: Jailbreaking the Discrete IC Bank A limitations Apple imposed on all but top tier Macs + SimmSpender 3.0

[Trash80toG4]

Been hacking away at limitations of the IIsi for many years and it's time to revisit that project and expand it to other Macs:

SIMMspender™ & IIsi memory expansion hack reboot.

I need to figure this out all over again, but at least I can play with it at work. SIMMspender™ is the reverse of a SIMM Saver, it breaks the four 30pin memory sockets in a bank out to a pair of 72pin 32MB SIMMs. This one includes another pair of 72pin SIMMs on the bus and addressing jumpers...

68kmla.org

LCIII memory expansion now underway by @max1zzz

https://tinkerdifferent.com/threads/breaking-the-36mb-ram-limit-on-the-lciii.1344/post-9515

Quadra 630 and Quadra 605 are my other target systems, let's see how far we can expand Apple's sealed envelope!

 

[Trash80toG4]

IIsi: soldered Bank A to high capacity 72pin SIMM conversion study:

Well that pretty much covers funneling soldered Bank A ICs into a 72pin SIMM pinout. Color coding is a bit off with gray Data lines on SIMM meant to be connected to purple Data lines on the DRAM ICs.
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Addendum: forgot to clarify the diagram for anyone interested in a general way.

Bold lines heading down into the 72pin SIMM are the signals that need to be patched from MDU, the IIci/IIsi memory controller.
- MDU has discrete connections implementing Bank A and Bank B for whatever reason.
- buffering of the Vampire Video subsystem would appear to be the culprit from my point of view?
- - Haven't looked at the IIci schematic looking for any hint of that
- - IIsi has Vampire Video hardware buffering of the first __ of Bank A cut out entirely from main memory.
- - - detection of sense lines for video config at startup kicks in the Vampire Video buffering.

- pointing down form the SIMM socket at the soldered DRAM pads would be the bulk of signals required to support easily (LOL!) patched from there using .05 2x5 RA headers upon which the prototyping setup will plug . . . if and when.

WAG would be that during IIci development and the MDU build, Apple had decided to go two directions with Video Memory in the future. Lamed low-midrange products would be lamed by Vampire Video and high end systems would head the VRAM SIMM direction?

TBC?

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Now for the fun stuff! Expanding a 72pin based machine by hijacking the CAS/RAS/Address/Chip Select Lines Apple tied down to that damned Bank A of limited capacity, soldered DRAM ICs.

Example-00

Not sure if I bought this one or not, can't find the dang SIMMspender project box, but I think I snagged it. The Minden Enterprises adapters were especially interesting IIRC. The one above requires only buffering for expanding one SIMM socket into two.

Example-01

Sorry for the crappy pics, I'll post better ones if and when. I have this 1->4 Expander in hand, haven't looked up the ICs, but this one appears to be a 16v8-somethingorother? That'd be a GAL formulation for turning a single 72pin SIMM Slot into four Slots?

The four ICs to is left are 74F32 and the pair on its right are 74F244 buffers as on the twin slot version above.

I'll try to figure out what's up with the camera tomorrow, but here are some pics to start as promised @max1zzz

 

[max1zzz]

That 4 slot riser is very intersting, i'm guessing that PAL is generating additional RAS signals for the extra simms
Given the marking of that chip (CE16V8) i'm guessing it's a PALCE16V8, hopefully it isn't protected as it might be hard to extract the code from it if it is

 

[Trash80toG4]

Gotcha, figured something like that was going down in there. Still haven't found my SIMMspender project box given the incredible mass of boxes jumbled about so it's probably too early to send this one out?

@Bolle Whatchathink about reading that one? I don't really care if it dies in the process. Just schematic development of the thing would be a great leg up I think?

 

[retr01]

@Trash80toG4, this is fantastic!

In the IIci, IIfx (equipped with the optional parity feature), and SE/30 (with 32-Mode INIT loaded at startup or ROM that is 32-bit clean), you can max out to 128 MB. Are there other 68k Macs that can max out to 128 MB?

The Quadra 800 maxes out to 136 MB. The Quadra 900 and 950 maxes out to 256 MB. The Quadra 700 maxes out to 68 MB - can it max out to 136 MB or even 256 MB with this SIMM riser?

Can no way need that much memory? I have not heard of any applications back in the day needing a massive chunk of 128 MB, anyway? Perhaps by utilizing RAM disk?

I noticed that you are building SIMM adapters that will insert into the existing SIMM slots, such as in the Classic II or Color Classic II. For the Mac Plus, SE, or Mac Classic, how do you get around the limitation of 24 address lines limiting the amount of RAM those Macs can access? IIRC, those three compact Macs are not members of the Macintosh II family.

Another question is which chip controller on the Mac logic boards and parts of the System software other than the address paths on the logic board manage the RAM storage? I know the operating system has a memory manager, and the address lines determine the maximum RAM.

 

[Trash80toG4]

All that's pretty much what we're trying to figure out. Per the diagram above, A11, RAS1 and RAS3 are all that's keeping Bank A of the IIsi from supporting a full 64MB to match Bank B's 64MB and yielding the IIci/SE/30 max. loadout of 128MB.

AFAIK, that's the limit for the 68030 II series, Quadras went to 256MB and a tad higher in special cases. My only target machines in the 68040 generation would be the Q605/LC475 and Q630. We'll see . . . eventually.

 

[cy384]

The Quadra 800 maxes out to 136 MB

the C650/Q650/Q800 hardware supports more, but the stock ROM lacks support for 64MB/128MB SIMMs. With hacks I've booted with a total of 392MB.

The ROM code often makes assumptions about what machines max out at, if anyone runs into these for a particular system I can point them to the code.

 

[retr01]

That is excellent, @cy384!

Suppose flashing 8 MB or maybe 16 MB ROM SIMM to work with all kinds of vintage 68k Macs, with instruction sets to tell the logic board and software that over whatever memory limit is okay, that would work? I understand that depends on the logic board and physical address lines.

What other factors would RAM limitation depend on?

 

[max1zzz]

the C650/Q650/Q800 hardware supports more, but the stock ROM lacks support for 64MB/128MB SIMMs. With hacks I've booted with a total of 392MB.

The ROM code often makes assumptions about what machines max out at, if anyone runs into these for a particular system I can point them to the code.

If you ever feel like patching the LCIII ROM to recognize more than 4Mb it's internal bank I would love to get the LCIII booting with 16MB in the internal bank

 

[retr01]

If you ever feel like patching the LCIII ROM to recognize more than 4Mb it's internal bank I would love to get the LCIII booting with 16MB in the internal bank

And there could be more RAM after @Trash80toG4 and others have figured out to implement the SIMM riser card.

 

[Zane Kaminski]

If you ever feel like patching the LCIII ROM to recognize more than 4Mb it's internal bank I would love to get the LCIII booting with 16MB in the internal bank

Issue is that although the 256kx4 and 1Mx4 DRAM pinouts match, the pinout for 4Mx4 is different. LC III has eight 1Mx4 chips, making a 1Mx32 array i.e. 4 MB. To go to 16 MB you'd need 4Mx4 chips:

1Mx4 chips as on the LC III for contrast:

Look similar but unfortunately the pin count and pinout is totally different. You can't just wire up the additional center pins on the 4Mx4 either. The whole pinout is shifted. So unfortunately you can't swap for a larger onboard RAM array like you can on the IIsi, at least not without a bunch of bodge wiring or redoing the RAM part of your repro board... do you think that's easily possible?

 

[retr01]

I agree with @Zane Kaminski. The circuitry on the board determines the exact pinouts/sockets that will work for the chips because of the final design approved by Apple. We can try to make things better, but ultimately, we could be bound to the limitations back then that were determined based on the needs of consumers and the economics of scale that led to the decisions to ensure Apple was satisfied with the bottom line.

Better to use software and modern hardware wizardry to get what we want out of the vintage Apple computers that we grow attached to.

 

[Trash80toG4]

@Zane Kaminski you're forgetting that max is the unrivaled Zen Master of the LC Clan and wields the power to bend the LCIII PCB layout to his will, even to the point of reformatting its form factor to fit another machine.

I keep telling him to move to another 72pin SIMM for Bank A, but I think he has a thing for soldered DRAM ICs?

 

[retr01]

The reality distortion field doesn't work with Science, @Trash80toG4.

 

[retr01]

@Trash80toG4, did anyone get a hold of or create the schematics of this SIMM riser?

 

[max1zzz]

I keep telling him to move to another 72pin SIMM for Bank A, but I think he has a thing for soldered DRAM ICs?

That's exactly what my breakout board dose (Well would do, if more than 4MB worked in the onboard bank)
My intention is to replace the onboard bank with another SIMM or additional RAM on another module and completely ignore the onboard bank

 

[Trash80toG4]

Sorry, lost track of that tidbit with all the projects coming together of late. Glad to see you've come over to the dark side.

 

[retr01]

Glad to see you've come over to the dark side.

(@Trash80toG4 on the right)

 

[Trash80toG4]

Musical chair links to attachments worked out great for once. Found this beauty randomly substituted for a link in one of my MLA posts:

Somewhere Pics surfaced of a much earlier machines being upgraded in similar fashion. ISTR that being a SIP to a single 30pin SIMM? @Zane Kaminski is this one of yours? Have you got a similar product? Very curious about what this one is doing?

 

[retr01]

Kinda tall! Barely fits?