Mythical Slot C in the 6400 Alchemy Architecture & CSII Insanity

[Trash80toG4]

@Androda got me entangled back into the web of CSII/PCI insanity with his amazing CSII 10/100 card project, so spinning off the tangent.

Genesis of the Quest for the 3rd PCI Slot in the 6400 Alchemy architecture over at the MLA some six years ago:

"In another thread, @trag mentioned that his SuperMac C600 had Slots A, B AND C along with CS2. Another tangent ensued because the SuperMac clone is based on the 6400's Alchemy architecture"

Three Slot Riser for 6400 - In search of the Mythical Slot C

In another thread, trag mentioned that his SuperMac C600 had Slots A, B AND C along with CS2. Another tangent ensued because the SuperMac clone is based on the 6400's Alchemy architecture. Long story short, got this riser in hopes that it would plug into Slot A and give me A, B, and the...

68kmla.org

In no particular order, the AI musings from that thread:

 

[Trash80toG4]

Noodled out a knuckle dragger level test setup.

First difference I spotted in my quest to put a two slot PCI riser in my 6360 was the REQ line anomaly on the 6400 PCI riser:

1) Slot A connects to REQ pin B18 as expected.
2) Slot B REQ line connection is made to RESERVED pin B14 on the PCI Bus.

So another one of these flexible risers is winging its way for a perf board testing setup:

All RESERVED lines on the the mobo slot will be soldered to header row set opposite header row tied together leading to REQ at B18 on riser.
REQ line on Board slot soldered to a header on one end to test setup is working as Slot A.

1) Jumper playtime will hopefully confirm that REQ line for Slot B connecting to RESERVED line B14 is single differentiation point for Slot B.
2) Musical jumpers will hopefully then test theory that REQ lint of C600 riser above is connected to one of the four remaining RESERVED lines?

On a lark, DEVICE SELECT B37 will be soldered to a header on the other end of the breadboard rig.

1) leaving that line open might be interesting?
2) DEVICE SELECT on CSII may be analogous to the oddball REQ lines of the PCI Slots?

WAG: CSII might show up as "Slot D" on the PCI bus test rig if all planets stars align just right?

1) CSII on the SuperMac C600 riser above might be a fourth "Pseudo PCI Slot. Guessing not likely?
2) Much more likely would be that the tape covering CSII on @trag's riser indicates that Slot C/CSII is an either/or situation
3) If either/or test may prove that CSII can indeed be hijacked as the mythical Slot C.

Gigabit NIC in PCI Slot C hijacked from piddling CSII capability anyone?


If anyone can come up with more mayhem I can work upon that flexible riser cable, please advise!

Comments?

 

[Androda]

Gigabit NIC in PCI Slot C

I mean, if you want a Gigabit Ethernet Comm Slot II card just let me know. I definitely didn't find some Gigabit Ethernet PCI chips which are compatible with OS 9. (though honestly that would be minimal to no benefit over 10/100 due to Mac OS bottlenecks and OS compatibility limitations)

 

[Trash80toG4]

Yeah, I know it wouldn't get far past 10/100 performance, but it's a game of inches under OS9 on Alchemy/Gazelle.

Your CSII 10/100 card will most certainly the way to go in almost every actual case. My flights of fancy are many times impractical and only other crazies would be interested in implementing such things when they do pan out.

 

[Trash80toG4]

CS!!-2-PCI

 

[Trash80toG4]

Test setup shaping up.

 

[Trash80toG4]

Research steps done, time to build the Slot C search testbed setup. Waiting for one more part to arrive.

To recap: as you can see in the 6400/6500 PCI Riser, slot selection for Slot A is done in the "usual" way. It's Apple's way, not following PCI spec just as they failed to follow the NuBus spec. There theydid slot selection by implementing a single, non-standard, specific hardwired slot selection signal.

In the blue trace you can see that slot selection for Slot B is done from a RESERVED line on pin B14 of the PCI Bus.

Testing every RESERVED pin on the PCI Slot and the CSII is the task.
- Test connection for Slot A to confirm function of the setup
- Test connection for Slot B will hopefully prove that only that one line is the only difference between Slots A and B
- Test connections to the four remaining RESERVED lines on the PCI bus might just locate the mythical Slot C
- Test connections to the eight RESERVED lines on CSII might prove interesting

So it goes . . .

 

[Trash80toG4]

Test setup done on PCI side of things yesterday. Got interesting results, got WONKY results this morning!

So it was back to basics this afternoon. Looks like diagram above is in error. I was pulling the GRANT line on pin 17 to ground on pin 18.
Du-oh . . .

 

[Trash80toG4]

Got the test setup up on the yesterday! No joy, but very interesting results for further experimentation.

Successful test boot with single slot riser cable based Test Setup with no card installed.

Using a USB card that was ready to hand:
- came up as unrecognized card in Slot A1 per TattleTech PCI Slot report in standard config per black trace above
- same result when hooked to blue line in diagram above,
- surprising but not entirely unexpected given Apple's non-standard PCI implementation

Second Round today:
- Video Card and Apple Two Slot Riser pulled from SE hack
- Comes up as expected in TatteTech PCI report

WONKINESS!
_ no boot with VidCard swapped into setup . . .
____ no cable attached to VidCard
____ onboard video screen goes bonkers!
________with no boot, onboard video outputs full screen White, R, G, B in sequence, repeats!


_______________________________________________________________________________


Back to basics and major BOO-BOO detected yesterday was fixed!
_ PCI Diagram error was the culprit
____ had GRANT line on slot mapped to Pin 18 instead of Pin 17

CableMonster now set up correctly, no longer shorting GRANT to GND.

 

[Trash80toG4]

Next steps . . .

 

[Trash80toG4]

Back to basics . . .

 

[Trash80toG4]

Printed out the MLA thread for highlighting/markup. Getting my head together, which is quite the project in itself.

 

[Trash80toG4]

Ok, just made some headway!

Now I need a little help:
_ WTF is a resistive connection to an address line?
_ How can I implement it on the Ribbon Cable Riser?

Was planning to put a tap line on the four address lines @trag defined on the SuperMac ABC Riser above and suggested for CSII.
Does this mean I need to add a resistor between address line tap and IDSL? That was first thought, but doesn't seem at all right as the 6x00 riser is passive.

 

[Trash80toG4]

Resistor . . .

 

[Trash80toG4]

TGIF, this Sunday night. IRL I'm in Sitka, Alaska's time zone with my internal date line 48 hours off kilter, but it works for me.

Finally got quite a bit done on converting the CableMonster above from Slot A to Slot B status! If that breadboard setup is successful, I've got the markers set up to start snooping around for additional Slot X.

Biggest problem for my "weekend" will be measuring the resistance of R1 on the 6400/6500 Riser. Outside of a pair of capacitors it's the only "active" component on the 6400/6500 TwinSlot Riser. This finally clued me in to WTF a resistive connection to an address line for IDSEL might be!

Working assumption is that the resistive connection to IDSEL at Address 13 for Slot A is done on the logic board, elst the straight thru ribbon cable riser would not be functional? We know that the Interrupt Request pins are tied together on the logic board, so I think I'm on the right track there?

After metering that, it'll be time to see if a resistor is in stock or find one on several logic and various custom internal PSU boards from which I've recently harvested a slew of interboard connectors.

We shall see what we shall see . . .

@trag please come back in from out of the weeds and give me a little feedback on this nonsense?

 

[Trash80toG4]

CSII->PCI

 

[Trash80toG4]

Time to start playing breadboard checkers soon.
1 - test that cable riser works
2 - test Slot B connections
3 - explore turning CSII into a full PCI Slot by snatching signals

Long shot will be locating the signals for Slot C. @trag and I are wondering if Apple didn't implement a connection from the BGA PCI Controller. If Slot C exists, UMAX did so.

Taped over CSII Connector on UMAX riser begets a sneaking suspicion that CSII/Slot C is an either or kinda deal?

 

[Trash80toG4]

Found another Reserved Pin used as an alternate input for Slot B. Apple!

Slot A on the 6x00 riser connects to A7-Interrupt _C as might be expected. However slot B connects instead to A9-Reserved as opposed to any standard PCI setup.

So we have Interrupt_C and Request lines for Slot_B connected to Reserved pins of the PCI specification. Spelunking continues . . .



edit: bright side to this! There's one less variable for the breadboard/checkerboard search for the mythical Slot C!

 

[Trash80toG4]

1996 2nd Edition:

Designing PCI Cards and Drivers for Power Macintosh Computers - Higher Intellect Vintage Wiki

Trouble viewing this PDF? Try accessing via File:Designing PCI CdsDrivers 96.pdf

wiki.preterhuman.net

Has anyone seen a link to the 1995 first edition of DPCICfPMC?

 

[joevt]

Has anyone seen a link to the 1995 first edition of DPCICfPMC?

Did you check the Apple Developer Discs? Maybe 1995 Reference Library discs:
https://archive.org/download/Apple_Developer_Discs_1989-2009/1995/Reference Library/