(2) Macintosh SE/30's - Full Restoration

[caver01]

Glad to know D(31) can go missing and still POST correctly, thanks for the input. What caused your D(31) to break in the first place? Was it battery or cap related?

SO, I think the generalization gets mistakenly applied because address and data lines are on a “bus” and many components are tapping into that bus in parallel. I am perhaps oversimplifying it, but in my case, D31 may have only been broken between CPU and SCSI (or more likely, it was D31 on SCSI alone—I don’t recall). What I DO know is that it failed continuity between the SCSI chip and the CPU. Given the routes of these bus traces, it might be that it was a trace near the SCSI chip that corroded due to cap electrolyte and D31 would tested clean between the CPU and other components! Now that would really have been frustrating if I had been trying to move forward under an assumption that D31 in general was ”GOOD”.

In any case, it was the SCSI symptom that led to my checking continuity between the address and data lines, and that’s how I found it. Once I bodged what was a known failed connection, electrically, the bus was repaired again having bridged the broken location. To date, I don’t actually know where it failed. Maybe a via? I probably fixed other components relying on it at the same time.

 

[caver01]

I could ask the question: what Address lines could be broken to cause a simasimac condition - and never get an answer

To my point, I think the question is too broad— you would need to ask, what Address lines could be broken between chip X and chip Y, or from the bus to chip X and so on. A broken address line to the sound chip, for example, might be fine until audio kicks in. That was the case while troubleshooting the ACS for example—the OS would freeze if you played any audio. At POST, it would appear to work, but no chime.

Yet, the same address line broken at the ROM could present as simasimac. I think it just depends where and what.

 

[caver01]

Thinking about this a little more— given the inevitable electrolyte leaks happen across all of the boards in roughly similar locations, we have good techniques to find the common issues, but now that I am long past the point of frustration or impatience, I find that the variances from case to case, and the potential random impacts are what makes each of these “fun” and unique! Even the veteran experts here haven’t seen everything, and there are likely still surprises to discover by the next troubleshooter. The community definitely helps!

 

[patters]

I have purchased a few things from overseas since the tariffs began, none of them were $3 with $60 shipping.

Pardon Our Interruption...

EDIT: 30% was the steepest charge for shipping plus the tariff fee on ebay, on my past purchases.

It's the same nonsense in the other direction for us Europeans. USPS rates quoted by most suppliers are similar, and yet we can have stuff air freighted from China for a tenth of the cost.

 

[GreenBar0n]

To my point, I think the question is too broad— you would need to ask, what Address lines could be broken between chip X and chip Y, or from the bus to chip X and so on. A broken address line to the sound chip, for example, might be fine until audio kicks in. That was the case while troubleshooting the ACS for example—the OS would freeze if you played any audio. At POST, it would appear to work, but no chime.

Yet, the same address line broken at the ROM could present as simasimac. I think it just depends where and what.

From the Simasima Repair Guide:

1. After initial power-on, and the voltages stabilize, the sound chip releases the reset line
2. The CPU begins executing code
3. The GLUE logic maps the ROM to the start of the address space (address $0)
4. The CPU begins executing code from the ROM SIMM using one of the VIA chips
5. Boot-time diagnostics check if the system is operating normally. If any failures are detected or the user presses the NMI
(non-maskable interrupt) button:
A. A "Sad Mac” tone is played (if the sound chip and circuitry is working and it is able to be selected by the GLUE logic).
B. The system ROM will attempt to start Apple Test Mode.
This mode will attempt to set up communication with the SCC (serial port controller) and Apple’s TechStep hardware
diagnostic tool. Note, this can be simulated with a serial connection.
6. After all tests pass, the ROM will remap the RAM into address $0 (by use of the VIA) and the system ROM will attempt to
initialize video memory by with the video ROM.
7. The remainder of the boot process commences

I've noticed if at least (4) good RAM SIMM's are not installed, simasimac occurs, but a bad Address line in the RAM banks still seems to allow Apple Test Mode to operate and produce a Sad Mac. If you can move the (4) good RAM modules to either Bank 0, or 1, which may not contain the bad Address line, you can still get to a Sad Mac and then be able to connect to the logic board with a serial cable, or TechStep and locate the bad Address line.

A broken Data line seems more likely to prevent the Apple Test Mode from starting at all - and without Test Mode operating it's much harder to diagnose.

The Adress lines broken to the VIA chips from the CPU, could be a likely problem too.