Macintosh II Rev.A - Reversing the Discrete IC Implemented Origins of NuBus

Trash80toG4

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This project has been several years in the works, but I've never had the Initial Release Macintosh II in hand. Thanks to a heads up from jeremywork over at the MLA, one is tracked to be arriving within the next 55 hours, but who's counting?

This initial release of the DCaD series would be the origin story of the Macintosh II and NuBus expansion's roots in Discrete IC implementation before Rev.B was released with the NuChip Controller ASIC:

Designing_Cards_and_Drivers_for_the_Macintiosh_II_and_SE_1987

Rev.A is silly after the fact shorthand, but it'll do. What was the Model Number on the License Plate of Rev.B Macintosh II? Did it remain M5000 as in the original without any announcement of the revision?
 
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Trash80toG4

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Pretty Case, somebody really knows his stuff spotting that board in this pic and of my longstanding fascination with NuBus.

MII-5000-Mobo.jpg


MII-5000-Front.jpg


MII-5000-Top.jpg


MII-5000-Back.jpg


MII-5000-Batts-2.jpg


One wonders why this board doesn't start up . . .

MII-5000-Bats-1.jpg


. . . m thanks to a higher power that Rev.A predates Maxell and the battery cages incapable of containing them. Has Rev.B got battery holders or soldered batteries? May try to power it up a couple of times, but those leads won't be connecting to anything very, very soon after arrival.

Many THX, j :)
 
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Trash80toG4

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Block Diagrams -

Figure_1-1_NuBus-RevA-DCaDFTMII-SE-02.JPG


Figure_1-2_NuBus-RevA-DCaDFTMII-SE-03.JPG



Figure_1-3_NuBus-RevA-DCaDFTMII-SE-04.JPG


Figure_2-1_NuBus-RevA-DCaDFTMII-SE-00.JPG


Figure_5-5_NuBus-RevA-DCaDFTMII-SE-01.JPG


Long term goal is learning enough about this stuff to implement the Rev.A discrete IC setup hooked up to the processor bus of the Macintosh_IIcx repro board that @max1zzz has up his sleeve. Burning its NuChip implementation to its bare foundations will be icing on the cake . . . candle stub puddles . . . whatever. :p

IIcx implementation will be done as a swap out control board for testing, if and when. Other target developments would include expanding upon the NuBus setup in the DuoDock and trying out an implementation done with stock TI parts.

Where's best spot to post and link to my PDF version of TI's 1990 NuBus Parts Catalog?
 
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Melkhior

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Oh, that seems in excellent shape! Great for you, but to analyze the BIU one would need the detail of the chips (and reverse-engineer the configuration of the PAL/GAL they used) and the detail of the traces... and that would require somewhat dismantling the board, which would be a bit of a shame if it still working fine after all these decades.
 

Trash80toG4

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Details will be forthcoming. First step after battery removal will be buzzing connections. ICs will definitely be desoldered and socketed for reading the contents of the logic ICs and their transfer to the BlackMagicalBus riser card along with the bus transceivers I think. Though those might be decipherable and reproducible on the Rev.A DIMM Slot riser board without removal.

When it comes to my noodling something out, NOTHING is sacred. :p
 
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Trash80toG4

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I'm officially late for work. As I was leaving it was at my doorstep, a day early, well packed, fully intact including programmer's switch. It has the prettiest, most nicely accented, new in Mac TOBY card that I have ever seen! :D
 

Androda

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As shown in this Wikimedia image: https://upload.wikimedia.org/wikipedia/commons/7/76/Apple_Macintosh_II_motherboard.jpg

It looks like things are implemented with:
HAL16R8
HAL16L8

(under the nubus slots)

These are the mask programmed (not flashable) versions of the more common GAL16 style. I'm unclear on whether the programming could be read. The HAL16R8 chips will pose a problem if their contents can't be easily dumped, because they are the Registered style (hence R). Registered GAL chips are dramatically harder to reverse engineer, as they can change their behavior based on past input levels.
 

Kai Robinson

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Might be time to rope in Porchy and Max for the reading of those as well. For the NuChip - I did send one with a broken leg to @jgrip for imaging - which might also come in handy, if it's an off the shelf ASIC like the BBU is.
 

Bolle

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@Bolle ISTR you having one of these boards? Do you know what programmable logic ICs are used in the Rev.A and if they are crackable?

I do have one of them. They are not programmable ICs at all. HALs are the mask programmable variant of PALs. No sure if they even contain the the required logic to be read. I don't think they do.

Registered GAL chips are dramatically harder to reverse engineer, as they can change their behavior based on past input levels.
But at least all states are clearly visible and only change every clock cycle. L-type combinatorial parts change their output states instantly (disregarding the 5-25ns propagation delay - still instantly to the eye) actually making it harder to capture all output states. As soon as asynchronous feedbacks and/or latches are used and a single input change triggers two different output states that just happen very quickly (at the speed of the propagation delay) after each other you won't catch those with simply dumping an L-type PAL like an EPROM.
Slowly stepping through the states on a R-type PAL by toggling the clock pin and taking notes of the output states you'll usually quickly see what's going on... it's definitely not "harder" than L-type PALs - there's just different pitfalls involved ;)

I did send one with a broken leg to @jgrip for imaging
That would work on the HALs as well... one should be able to see the exact fuse configuration on those.
 

Trash80toG4

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Here we go again, guys. As the apprentice, this is what I do on these projects. Once I set up all the pins in a neat grid I can watch you sorcerers team up to bowl them over one after the other! :p

@Bolle Are you saying that it's not practical, or even possible to build an automated datalogger to brute force the input/output table for some or all of these individual components?

You've got Radius' discrete component NuBus adapter for the IIsi on hand, what components are used on that, what type? On the Macintosh model development timeline, PAL/GAL technology was up and running for IIsi and PowerCache et al, whereas Rev.A development predates that technology, no? Were the masked types but low cost alternatives for high production run products?

IIsi adapters need handle only a single NuBus Control/Interrupt line setup hardwired on the 030 PDS. By the time Duo230/DuoDock system was in development, it appears to me that Apple diverged from their non-standard NuBus Control Line implementation.

To me, Apple appears to have used a then available (rebadged) Controller/Transceiver Chipset trio from TI lying directly on the Address/Data Bus of the Duo System 030 PDS Docking Connector. Methinks they'd dropped their out of spec NuBus implementation by that time, almost certainly by the introduction of NuBus90? Gotta re-check the Docking Connector spec to confirm. I'll post that here for comparison.

My vision of this would be that the (out of spec) Rev.A discrete logic implementation makes up the building blocks TI condensed into the NuChip ASIC for Apple. Hopes are (were?) that we could take NuChip apart piece by piece.

TI had the license for NuBus development and some of Apple's later implementations (IIsi Adapter and DuoDock) bear a striking resemblance to stock parts from the TI catalog.

Speaking of which . . .

TI-NuBus_Interface_Products-Data_Book-1991.JPG


. . . I snagged this 315 page .PDF in a previous lifetime. If an admin would like me to email it as a resource, PM an addy. I think it might make a good one?


p.s. love your new, inverted cubist avatar, Bolle. :ROFLMAO:
 
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Kai Robinson

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You could use the pinouts referenced in the BOMARC schematics to see if they line up with the pinouts of the TI offerings. If the pins are merely re-arranged, you could build an interposer of some description, like the castellated PLCC replacements they use on NeoGeo & JAMMA boards.
 

Kai Robinson

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Here we go again, guys. As the apprentice, this is what I do on these projects. Once I set up all the pins in a neat grid I can watch you sorcerers team up to bowl them over one after the other! :p

@Bolle Are you saying that it's not practical, or even possible to build an automated datalogger to brute force the input/output table for some or all of these individual components?

You've got Radius' discrete component NuBus adapter for the IIsi on hand, what components are used on that, what type? On the Macintosh model development timeline, PAL/GAL technology was up and running for IIsi and PowerCache et al, whereas Rev.A development predates that technology, no? Were the masked types but low cost alternatives for high production run products?

IIsi adapters need handle only a single NuBus Control/Interrupt line setup hardwired on the 030 PDS. By the time Duo230/DuoDock system was in development, it appears to me that Apple diverged from their non-standard NuBus Control Line implementation.

To me, Apple appears to have used a then available (rebadged) Controller/Transceiver Chipset trio from TI lying directly on the Address/Data Bus of the Duo System 030 PDS Docking Connector. Methinks they'd dropped their out of spec NuBus implementation by that time, almost certainly by the introduction of NuBus90? Gotta re-check the Docking Connector spec to confirm. I'll post that here for comparison.

My vision of this would be that the (out of spec) Rev.A discrete logic implementation makes up the building blocks TI condensed into the NuChip ASIC for Apple. Hopes are (were?) that we could take NuChip apart piece by piece.

TI had the license for NuBus development and some of Apple's later implementations (IIsi Adapter and DuoDock) bear a striking resemblance to stock parts from the TI catalog.

Speaking of which . . .

View attachment 5927

. . . I snagged this 315 page .PDF in a previous lifetime. If an admin would like me to email it as a resource, PM an addy. I think it might make a good one?


p.s. love your new, inverted cubist avatar, Bolle. :ROFLMAO:

Anyone can upload resources here - so feel free to upload it! :)
 

Trash80toG4

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You could use the pinouts referenced in the BOMARC schematics to see if they line up with the pinouts of the TI offerings. If the pins are merely re-arranged, you could build an interposer of some description, like the castellated PLCC replacements they use on NeoGeo & JAMMA boards.
Anything I'll build will be a new PCB daughtercard for an abbreviated version max's Macintosh IIcx board. Hope to test several configurations in a DIMM slot placed between Slots and the main logic board. Throwing in a PDS slot and maybe a IIci Cache Slot adaptation for my PowerCache for bonus points.

Forgot to mention, form factor will be full size Mac II board or board assemblage with three slots implemented next to the PSU, attenuated logic board under the drive shelf and playground in between. 🙃
 
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