From Duo System DevNote
Connections deleted for brevity: Address, Data, Power, GND, Docking Control lines, passthru connections for ADB, FDD, Serial, Modem, Sound, sleep etc.
Duo System Main Expansion Connector
Table 4-1 Main expansion connector signal assignments
Pin ___ Signal name ___ Description
9 ____ /STERM ______ Synchronous termination
10 ___ /DS __________ Data strobe
13 ___ /HALT ________ Halt
14 ___ /BERR _______ Bus error
15 ___ /BGACK ______ Bus grant acknowledge
16 ___ /IPL0 _________ Interrupt priority level signal 0 (least significant bit)
17 ___ /IPL1_________ Interrupt priority level signal 1
18 ___ /IPL2 _________ Interrupt priority level signal 2 (most significant bit)
40 ___ IOCLK _______ 15.6672 MHz I/O clock
41 ___ SIZ[1] ________ Transfer size bit 1
87 ___ /DSACK1 ______ Data size acknowledge bit 1
88 ___ /DSACK0 ______ Data size acknowledge bit 0
89 ___ /BR __________ Bus request
90 ___ /BG __________ Bus grant
92 ___ FC[1] _________ Function code bit 1
93 ___ FC[0] _________ Function code bit 0
94 ___ /RMC _________ Read-modify-write cycle
95 ___ CPUCLK ______ CPU bus clock
96 ___ /CPURESET ___ CPU reset (bus invalid)
116 __ RD __________ Read/Write
117 __ SIZ[0] ________ Transfer size bit 0
136 __ MI ___________ Memory controller inhibit for cache access
138 __ /SLOT E ______ IRQ Pseudo-NuBus expansion slot E interrupt
140 __ /IO RESET ____ Reset output to I/O systems
Interesting stuff, but not directly related to 030 PDS implementation of DuoDock
8 ___ /CIOUT _______ Cache inhibit out
85 __ /CBACK _______ Cache burst acknowledge
86 __ /CBREQ _______ Cache burst request
From this breakdown, it's clear that there are no dedicated NuBus Control lines, which leaves some possibilities
A ___ NuChip 34 represents a clean break from Apple's non-compliant NuBus implementation?
________ Slots are mapped from address and data lines, achieving CPU agnosticism of NuBus spec.
________ Makes sense, as from the beginning, Apple promised a PPC upgrade path for the Duo System
________ Apple later came to regret this and only grudgingly released the amazingly flexible 2300c board
B ___ NuChip_34 remains an Apple Kluge?
________ Slots are mapped to SuperSlot address space assigned to Slot E/$E interrupt
________ Slots are remapped to Address Spaces of Slots _ & _ as below
Occam's Razor would tend to support option A and Apple's use of an available, standard issue NuBus controller re-badged by supplier? But then again we're talking about Apple.
WAG would be that NuChip_34 was used in the Quadra series? First gen Q700 utilized some NuBus controller kluge labeled YANCC, again Apple.
Haven't got DevNotes on hand for the rest of the Quadra series, my Technical Tomes are boxed up somewhere and the IIfx is buried under and behind more boxes. Really looking forward to getting things back together again after last of the slab's carpet is replaced.
The 40MHz bus implementation of the IIfx would be an anomaly. The one pic I have readily available has an Apple labeled ASIC with TI logo which appears to be its NuBus Controller? Anyone got spec on that handy?
Q840AV and its 40MHz bus would be another anomaly, what controller is used on that board?
Duo System was developed for release in October of 1992, smack dead center of the morass that was Quadra development.
NuBus Controller
The NuChip 34 controls the interface with the optional NuBus cards. It is similar to the
NuChip 30, but with modifications that enable it to run at 33 MHz. NuBus cards occupy slot and super-slot segments C and D of the PowerBook Duo computer’s I/O space. (The flat panel video display occupies the address space normally occupied by NuBus slot 6. External expansion video and most I/O appear in the address space normally occupied by NuBus slot E.) Table 14-11 shows the I/O space for the NuBus cards.
Table 14-11 NuBus I/O space
Starting address __ Ending address __ Comments
F __ A00 0000 ____ FDFF FFFF ____ NuBus slot space
A __ 000 0000 ____ DFFF FFFF ____ Super slot space
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Above was put together over coffee while in morning musing mode. Following up with a comparison of the slot address space defined above with standard NuBus Slot address space and related Block Diagrams will have to be done later.
