Hmmm....I have a dual FDHD SE. Even if I swap out to an 800k for one of the drive bays, I still can't do 400K, eh? Go WarpSE! 
WarpSE: 25 MHz 68HC000-based accelerator for Mac SE
- Thread starter Zane Kaminski
- Start date
Based on my previous dialog with Zane in this thread, when you have a WarpSE installed, it doesn't matter if your SE motherboard features an older IWM or newer SWIM chip because WarpSE comes with the SWIM flashed. With WarpSE, if you want the IWM (while keeping the WarpSE active), you just flash WarpSE using a vintage MacOS app. It's basically the same sort of app you use to flash the original ROM-inator), and you then have the older IWM which lets you have 400K and 800K drive compatibility (no 1.44MB drive compatibility). Again, this is the discussion I had with Zane earlier in this thread.
More things to note...
1. Even in a stock SE board without a WarpSE, you can use the newer SWIM chip with the older ROMs, and you get 400K/800K drive compatibility, regardless of whether you have a 1.44MB or 800K drive installed. I've not tested that only because I have a non-functional (due to rust) 800K drive installed in my SE Reloaded machine.
2. Newer SE ROMs require you to boot from System 6.0.3 or newer, but the older ROMs let you boot into System 1.0. Presence of a SWIM or IWM shouldn't impact this, but I don't have newer ROMs to test that. I do know that I cannot boot System 0.85 even with my older SE ROMs and IWM, but that is the System Software with funny looking folder icons that shipped with the original 128K's tour disk, so it's not a huge loss. The Mac Plus (in theory because I don't have a Plus to test) and earlier Macs (tested by me) can boot from System 0.85, however.
3. If you have a 1.44MB SuperDrive floppy drive and old ROMS and IWM, you should be able to use that drive to read/write 400K & 800K disks, but just not 1.44MB disks. I've not tested a 1.44MB floppy drive in my SE, however, to confirm that.
And @mdeverhart, earlier in this thread, I explained that the SWIM has the IWM and ISM that can do GCR and MFM formatting on the 3.5" floppy disk drives that support those, such as the Sony 3.5" 1.44 floppy disk drives.
However, the 400K support was dropped beyond System 7.1, AFAIK. So, with System 7.1 and below, can use 400K.
However, the 400K support was dropped beyond System 7.1, AFAIK. So, with System 7.1 and below, can use 400K.
Last edited:
No! I just wanna be clear that this isnāt true. The SWIM isn't something you can flash or store somewhere to enable 1.44M floppy support. The WarpSE will have the FDHD ROM but not the SWIM chip. It's not something that can be added to the Mac without connecting to the floppy drive. So you will have to supply your own SWIM chip if you want to use 1.44M floppies.
Okay, the disk storage I/O would be handled by the SE logic board's IWM or SWIM since WarpSE is the accelerator. Correct?
Yeah. Now if someone could come up with the Verilog code or logic schematic of a SWIM chip, we could just integrate that on the WarpSE and put our own 20-pin floppy connectors. Big Mess O' Wires has his Yellowstone disk controller for the Apple II but I think it's only an IWM, not a SWIM. I'm not aware of any other IWM/SWIM implementations so we're outta luck.
Yeah...I wonder.
IWM. IWM has been used with Apple II for a long time. Perhaps. I have the Yellowstone in my IIGS. Hmmmm.
Yellowstone uses Lattice FPGA, which may have been programmed in the designs of the Universal Disk Controller by Laser vTech.
The ability to write 400K disks was dropped at some point I think (but believe it was later than 7.1?? maybe Iām wrong). But you can certainly still read 400K disks with later system versions. I do it all the time on my SE/30 running 7.5.5.
My point (which I probably muddled), was just that Iām skeptical thereās much of a market for replacement SE ROMs, other than maybe as a repair part. Clearly thatās just my opinion, and I donāt have any data one way or another to back it up.
That said, it sounds like it would be the same hardware as the IIgs ROM01 kit that Zane / GW already sells, so at least itās not a new hardware design.
That said, it sounds like it would be the same hardware as the IIgs ROM01 kit that Zane / GW already sells, so at least itās not a new hardware design.
My muddled memory of that era tells me it might not be so much an hardware issue as a filesystem issue. Original Macs were using MFS (Macintosh FileSystem) on the 400K floppies, before the introduction of HFS (Hierarchical FileSystem) that may or may not have coincided with the introduction of the 800K in the Plus.
I suspect 400K floppy using MFS were dropped somewhere in the 7 era, but 400K floppy in HFS remained supported.
To my knowledge, the ability to read 400K floppies with any format was never dropped during the System 7 era. Certainly my SE/30 running 7.5.5 can read MFS-formatted 400k floppies just fine. (The folders donāt show up ā¦ but the files are all there.)
(While it was theoretically possible to format a 400K floppy using HFS, in practice this was never done. MacGUI has a nice blog post explaining how to do it if you really want to.)
FWIW LowEndMac (which is not always correct) claims that the ability to write 400k floppies was removed in 7.6, and the ability to read 400k floppies was removed in OS 8. (Not in 7.1 as was stated above.)
Sorry to Zane etc. for the tangent.
Just grabbed the Sony-Tektronix AWG2040 out of storage. Iām gonna use it to try overclocking the WarpSE. This thing can output an arbitrary waveform at up to 1 gigapoint per second:
This piece of equipment is admittedly overkill for clock generation purposes. It can output any wave and at quite high sample rates but Iām just using it to put out a 33 MHz square wave. I just donāt have any other equipment that can put out a square wave at such a high (> 25 MHz) speed. It has a nice enough output:
1.3 ns is a fast enough edge rate. Too slow and you get problems where different chips see the clock go off at substantially different times. I usually aim for a 1ns clock edge in 10-100 MHz systems but this is good enough.
This piece of equipment is admittedly overkill for clock generation purposes. It can output any wave and at quite high sample rates but Iām just using it to put out a 33 MHz square wave. I just donāt have any other equipment that can put out a square wave at such a high (> 25 MHz) speed. It has a nice enough output:
1.3 ns is a fast enough edge rate. Too slow and you get problems where different chips see the clock go off at substantially different times. I usually aim for a 1ns clock edge in 10-100 MHz systems but this is good enough.
Last edited:
I mean, itās open source so you can do anything with it you want. Weāre going to be selling 25 MHz units, but I am just seeing how much further it can go. There are always the āworst caseā and ātypicalā specs in engineering specifications including for chips. So if I bump the clock up too far past 25 MHz, the RAM and Xilinx CPLD will have to operate faster than their worst-case specs. And the CPU as well, plus itās already overclocked by 5 MHz.Ooooo! Wow!
So, maybe we can up the WarpSE to 40 Mhz? What about the crystals?
Hey @Zane Kaminski! I thought about the WarpSE splash screen at startup on the SE and came up with those. 
Small update. As I mentioned earlier, the first 15 prototypes of the WarpSE require a few mod wires on the board between some of the socketed chips including the MC68k CPU. The first prototype used large diameter modwire but this prevented us from installing the CPU and ROML sockets:
We want to bin all of our CPUs for 25 MHz operation before soldering them down. Iām no good at really fine soldering so Garrett had to assemble a new board with the mod done in such a way that the CPU and ROML sockets could be put on:
See that little red wire? Much lower profile than the previous mod so now we can put the socket on and bin CPUs.
I had like 26 āfakeā or ārefurbishedā (as in the markings had been sanded off and new markings printed) MC68HC000s from some Shenzhen seller laying around so I tried em. They all worked! I was afraid maybe theyād be old MC68000s which obviously canāt run at 25 MHz.
Now that Iāve checked the CPUs, the prototype batch can be finished! Prototypes will use these āfakeā chips but the production units will have recycled socket pull MC68HC000s with original non-fake markings.
We want to bin all of our CPUs for 25 MHz operation before soldering them down. Iām no good at really fine soldering so Garrett had to assemble a new board with the mod done in such a way that the CPU and ROML sockets could be put on:
See that little red wire? Much lower profile than the previous mod so now we can put the socket on and bin CPUs.
I had like 26 āfakeā or ārefurbishedā (as in the markings had been sanded off and new markings printed) MC68HC000s from some Shenzhen seller laying around so I tried em. They all worked! I was afraid maybe theyād be old MC68000s which obviously canāt run at 25 MHz.
Now that Iāve checked the CPUs, the prototype batch can be finished! Prototypes will use these āfakeā chips but the production units will have recycled socket pull MC68HC000s with original non-fake markings.
Last edited:
