Woke up with my head as straight as it gets. Walk didn't do the reset trick. Did the illustration above without realizing that you'd probably have had all the info in thread already that you need for schematic development?
Mechanical doodle has pinouts for most everything that isn't 1:1 from SLOT_A to SLOT_B, but for capacitor setup.
Assumption that all four interrupt lines are tied together appears to be in error.*****
Hacksaw desoldering method revealed connections for capacitor setup you identified above:
Capacitor values you've identified in the schematic:
". . . the two caps C1 and C2 are connected to these pins PRSNT1# and PRSNT2#. So not decoupling."
***** Note that PCI_SLOT_2_INT and PCI_Slot3_2_INT pinouts differ in schematic. My questionable assumption that all four are tied together was in error.
However having all four tied together
appeared to work fine in my jumper cable test lashup.
Looks to me like a binary interrupt decoding setup indicated in schematic?
I got confirmation of SLOT_ID in TattleTech
PCI Slots report, but function testing wasn't done at that point.
Wondering if same holds true up in Slots B? IIRC all four interrupt lines buzzed out as connected on riser. Gotta check that out again.
Is pretty much everything you need for schematic development in this post?
/TANGENT
Reports also indicated I'd found the mythical SLOT_C and experimental SLOT_E:
PCB Development: TwinSlot Riser Project for TAM, 6360, 5x00 PowerMacs . . .
\TANGENT
Still confuzzled about capacitor pinout setup, but noggin's fried again at this point.
I'll edit in any other information we can think of into this post so it's packed all in one place.