Search results

I suppose one could take a video of the display to see if the raster is horizontal or not. It must be horizontal according to the timing info posted at https://68kmla.org/bb/threads/page-buffer-capture-from-radius-fpd-se-vram-input-first-baby-step-to-cloning-card.52646/post-594899 57.283 MHz...

An owner of a thread can delete the work of others by deleting their thread? That seems wrong.

Disconnecting data bits is one way to determine order of the bits. We know the order of the bits as seen by the Mac CPU side: big endian with the most significant bit being the left most pixel. Disconnect a bit on the VRAM. Try to set or clear all the bits. Read back the result. The stuck bit is...

The CPU is a 68K CPU. QuickDraw will use 68K CPU instructions such as MOVE or MOVEM to read and write pixels from and to VRAM for scrolling, or for drawing icons or windows and the mouse cursor. Are you thinking that the Mac has a framebuffer that is separate from the framebuffer of the Radius...

Does the Radius FPD/SE provide a vertical blanking interrupt?

Random access input and the serial output are both 16 bits wide. Figuring out data order of one will determine the order of the other. Can you map the PDS data lines to the VRAM input lines? That will tell you the order of the bits. But you said there's a GAL between the PDS and VRAM so...

I expect SOE to be tied together - that's an input. SO0 - SO3 are outputs and are probably used for the output raster. That's how most VRAM works - there's a random access port from the CPU and a serial read port for rasterizing. Or do you think rasterizing is using normal read cycles...

I had some comments/questions in the corresponding 68kMLA thread but it's not been accessible the past couple of days... I guess I'll re-ask one of the questions here. Why is SO0 of the 4 VRAM chips tied together...

Here's options for my fork of DingusPPC to allow the 1995-08 - 9630C68B - Power Mac 7200&7500&8500&9500 v2, SuperMac S900 ROM to detect bank sizes of 128 and 256 MiB for DIMMs that are 256 and 512 MiB. --comment "allow 512 MB DIMMs for 7200 v2 ROM" \ --patch FFF04538=54A4E054 \ --patch...

The algorithm for Hammerhead is different than for Platinum. Platinum Bank Base registers support addresses with this mask: 0x7FE00000 - 2 MiB resolution < 2 GIB. Hammerhead base address registers support addresses with this mask: 0x7FC00000 - 4 MiB resolution < 2 GiB. The algorithm for...

Maybe the hardware allows it. I don't think the ROM HWInit memory detection routines for Platinum might not. I've attached startup trace from DingusPPC. Ignore the sound DMA which is happening in another thread to play the boot chime while the RAM is being checked (the boot chime is played by a...

Here's the Platinum ERS.

On the DingusPPC Discord, you can find some memory controller documentation. Search for these: filename:Platinum_ERS_1.0.pdf filename:Hammerhead_ERS_Rev_1.1_19950925.pdf

A 128 MB DIMM is represented by two 64 MB banks in the Hammerhead and Platinum memory registers. In DingusPPC, 64 MB DIMMs and smaller are represented by a single bank but I suppose they could be represented by two banks also (i.e. two 32 MB banks for a 64 MB DIMM). The 7200 developer note...

Hardware developer notes at: https://leopard-adc.pepas.com/documentation/Hardware/hardware2.html#//apple_ref/doc/uid/TP40000979 Schematics here: https://www.macdat.net/repair/apple_schematics.html I guess they are not enough to answer your question? For the 7200 using Platinum memory...

I asked google "coil whine hot glue solution?" It says No, hot glue has a low melting temperature. Links to here for other solutions: https://www.techpowerup.com/forums/threads/how-to-quickly-easily-fix-coil-whine-coil-choke-noise.294015/...

The Apple Enet driver appears to have code that reads the PLSCCPort property so I guess the nvramrc script just needs to add this property. A system extension to add the property to the name registry might be more convenient (don't have to worry about nvram being zapped, etc). Just make sure it...

Right. ANS 2.0 ROM will use the AAPL,9500 identifier even if it detects itself to be an ANS machine. An ANS machine (whether using ANS ROM 1.1.20.1 or 1.1.22 or 2.0 or 2.26B6 or 2.26NT) will have PLSCCPort set to 1. A TNT machine will have PLSCCPort set to 7.

The PLSCCPort property is set by ANS 2.0 Open Firmware. It is not set by any other version of Open Firmware. 1 is for ANS 7 is for TNT I talked about this value at https://tinkerdifferent.com/threads/apple-network-server-macos-based-roms-found.4756/post-47393 If 1.1.20.1 is not writing the...

If the CD is bootable, then copying all of it to a hard disk partition should make the partition bootable. Then you boot that partition to do a real install to another partition. This only works if the software on the CD doesn't care that it is not booting from a CD.