There has been a recent commit for this project on github, and other commits in other projects. So probably just some delays and not enough time to post on TD.
Thanks!There has been a recent commit for this project on github, and other commits in other projects. So probably just some delays and not enough time to post on TD.
...the much-discussed sound issue is confirmed to occur right now on the WarpSE. I will have to stomp it out but it should be pretty easy. The solution is just to apply bandwidth rate-limiting on the sound RAM. It'll require some tuning but it should be easy enough now that everything else is working.
... disable the WarpSE by holding the programmers key while switching the Mac on.
Yeah, I think one step at a time. Eventually we will redo the WarpSE and eliminate all legacy parts including the 68k, asynchronous DRAM, and parallel flash. The DRAM and flash can be replaced by a single SDRAM chip plus a little serial NOR flash to store the ROM image. And of course we will need a big FPGA to replace the 68k. That’s in the future though.That's a beautiful design! I admire the RAM control logic - not that I understand all of it... Didn't know a CPLD could do that much, even a big one like this. But they're going to be expensive if Mouser is to be believed - you can get a decent Spartan 7 for that price! But the Spartan won't take 5V I/Os directly, of course :-( (and would need more extra support for config storage, etc., as well).
And of course we will need a big FPGA to replace the 68k.
I was really impressed with the Suska 68K10 core. There are a few other cores out there but they were all a bit obtuse and not so well tested. The Suska guy has been making 68k FPGA cores since 2000. He had an earlier core called the Suska 68K00 which started development in 2000 and was stable by 2012ish. Then he started the newer Suska 68K10 in 2014 (IIRC). Suska 68K10 had many releases over the next 7 years, and the 2021 release is said to be free of bugs and behaves identically to a hard MC68000 or '010. I instantiated it into a Lattice ECP5 FPGA a few months ago, but I couldn't get the timing simulation to go over something like 27 MHz. It could be that the timing analysis simulation was not properly constrained but just to be safe I'm not expecting a big performance increase if any when switching to the all FPGA approach.I wonder if there is a further development of the FX68K FPGA or another FPGA that does the MC68k stuff?
I was really impressed with the Suska 68K10 core. There are a few other cores out there but they were all a bit obtuse and not so well tested. The Suska guy has been making 68k FPGA cores since 2000. He had an earlier core called the Suska 68K00 which started development in 2000 and was stable by 2012ish. Then he started the newer Suska 68K10 in 2014 (IIRC). Suska 68K10 had many releases over the next 7 years, and the 2021 release is said to be free of bugs and behaves identically to a hard MC68000 or '010. I instantiated it into a Lattice ECP5 FPGA a few months ago, but I couldn't get the timing simulation to go over something like 27 MHz. It could be that the timing analysis simulation was not properly constrained but just to be safe
I'm not expecting a big performance increase if any when switching to the all FPGA approach.
It’s not so much extracting the core but rearchitecting it so it’s quite difficult compared to reading out a ROM. Anyway the AppleSqueezer uses the Spartan-6 which is a good FPGA and it used to be cheap but it has been in short supply lately and its future is uncertain. So I’m gonna use the Lattice ECP5 in the future although maybe I should investigate the Spartan-7 as Melkhior is always suggesting. Might be a little bit faster too and I get to use the Xilinx Vivado IDE which is apparently really good. I haven’t tried it.What about the Xilinx FPGA that is being used for the AppleSqueezer GS?
So far, it has been amazing for the Apple IIGS that blows out former accelerators and provides insane amounts of memory (which require an overhaul of the GSOS memory management to use that much memory). I wonder if Xilinx FPGA can be used to be a 68000 after putting the 68000 core in there?
Has anyone been able to extract cores from the 020, 030, 040, and 060? That is something to wonder about down the road.
Oh, me neither. After all, it was not that needed back in the day. Just be nice if it sped up a bit, right?
Indeed. As you mentioned the Suska cores look good, but unfortunately for later model not everything is open - the 68K30L is lacking the MMU, even though as I understand it internally a full version exists.It’s not so much extracting the core but rearchitecting it so it’s quite difficult compared to reading out a ROM.
Hehe, that' a case of 'if the only tool you have is a hammer...' As a newbie I started with Xilinx because they were market leader, so they were the one with the most examples and best third-party support in my perception. But there's benefits to using other devices, for instance the ECP5 you mentioned has decent open-source support (e.g. it can do this) in addition to the vendor's tool and can do very nice stuff (such as what this board supports).maybe I should investigate the Spartan-7 as Melkhior is always suggesting