Thanks for jumping in with both feet, bud! I know work has you well and truly knackered. So much information! Looks like the one RAS line thing for the eight chips on the IIsi board in my diagram is correct after all?
One review question: I have a suspicion that we figured that addressing two 32MB 72pin SIMMs from a bank of four 30pin SIMMs was the way to go for converting something like the SE/30 or IIsi over to 72pin SIMMs? 64MB SIMMs was not the way to go? Do you remember offhand? So, so long ago, sigh!
I don't remember (probably didn't) seeing such discussion. It seems to me that each bank of four SIMM sockets on the SE/30 could be replaced with a single 64 MB 72-pin SIMM (or one bank of a 128 MB SIMM). I don't know if that would cause any current loading issues. You'd be loading the bus quite a bit less than in a standard configuration. It would be similar to using four 2-chip 16MB SIMMs in each 30-pin slot.
Do 2-chip SIMMs work in SE/30? I seem to remember some discussion from Zane about it causing some kind of refresh issue.