WarpSE: 25 MHz 68HC000-based accelerator for Mac SE

Zane Kaminski

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Too complicated! I think it's better to use the memory-mapped frame buffer approach than piping the commands over SCSI as the ScuzzyGraph does. And as for the MagicBus connector, I think we have to reject it in favor of the in-line expansion approach or nothing if there's not enough room. It's just not architecturally novel, which is what I'm usually going for. Maybe in a future version I can implement a buffered 3.3V fast bus slot. That would be more interesting!

I would love a Brainstorm Accelerator for my Plus because of that bus accelerator.
WarpSE basically has it! :) All of RAM and ROM are on the 25 MHz fast bus so the only operations that go over the slow bus are I/O operations and writes to video memory. For video writes, the posted write buffer saves the fast CPU from slowing down to the slow bus speed unless the buffer is full. So I think the WarpSE will be faster than the Brainstorm in every metric! Once I get the WarpSE working, someone should redo the layout to fit in the Mac Plus soldered onto the 68000 CPU. WarpSE should work in there with no changes to the FPGA/logic, just hook it up to the Plus's 68000 instead of the SE's PDS.






Lemme say something generally about reverse engineering the BBU, BBA, etc. with the intent of cloning them. Why bother? Why not just make something new that conforms to the existing timings and functionality? Cloning the Brainstorm or BBU is okay, but the resulting product of the effort would be a subsystem that wants to be connected to a bunch of legacy chips in the particular arrangement of the Mac SE. And plus, getting it into the PLCC size and shape is not necessarily going to be cheap or easy. Why not just start with a blank canvas and make a new Mac chipset rather than a clone? I have some thoughts on this. If someone wants to do the board layout for a Mac SE reimplementation, I'll create the rough schematic and write the verilog for the FPGA.
 

lilliputian

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Once I get the WarpSE working, someone should redo the layout to fit in the Mac Plus soldered onto the 68000 CPU. WarpSE should work in there with no changes to the FPGA/logic, just hook it up to the Plus's 68000 instead of the SE's PDS.
I look forward to your and Garrett's forthcoming "Warp-Plus"! :D (Maybe with a DIP-switch option to run at just 16MHz?)
 
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Zane Kaminski

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Video/ATX PSU adapter is done!
Screen Shot 2022-04-20 at 3.20.58 AM.png

Schematic:
Screen Shot 2022-04-20 at 3.21.03 AM.png

Okay it really is about to be prototype time.

We don't have a logo but we are trying to be more consistent with our branding by adopting a particular wordmark/font for our products rather than just using the default font in KiCAD or whatever. See the top of the board here:
Screen Shot 2022-04-20 at 3.38.18 AM.png

Screen Shot 2022-04-20 at 3.37.35 AM.png
Is this any good? I've been told the "GW" underlined wordmark looks too much like General Motors but Garrett and I have absolutely zero ideas about what to do for a logo. So we underlined "GW" to make it more distinctive... "logic design" "logo design" ... sound similar, related etymology, but very different in practice 🙃 Any good or no?
 
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Trash80toG4

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Confused about physical location for Video/ATX PSU adapter? It's not in a standard breakout board form factor? If you do a breakout version, be sure to add a WiFi antenna mounting point. :)
 

Trash80toG4

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Forgot what you'd said upthread or elsewhere?

That Video/ATX PSU adapter would be for running the board/accelerator in a bench test config for the moment?

A dedicated thread for setting that kind of thing up would be great. WAG here is that you could set the board up behind an LCD on the Compact shaped bent plexi facia we've seen.

ATX PSU on the backside of the floorpan should counterbalance the LCD overhang nicely. Thinline Lisa config would be even better. Been working on that one already.
 

Zane Kaminski

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That Video/ATX PSU adapter would be for running the board/accelerator in a bench test config for the moment?
Yeah, it’s to run the Mac outside of the case so as to hook the system up to a logic analyzer more easily and also to do production testing of the accelerator.

Ooh I can try it on a rendered board if you can make a bit higher-res version.

lol you just happened to have that design floating around eh? :D
Pretty easy, just basically programmable inverters on all the hsync/vsync/video signals

Ooh looks good. I will put it on a board rendering soon.
 

Zane Kaminski

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I see a VGA connector in the schematic... Does that mean you're upscaling? To? 640x480?
Nope, too complicated. It just outputs the Mac 512x342 signal. So it requires a monitor which works with the unusual Mac line rate. I've got several HP L2335 monitors which work okay with Mac LC machines at 512x384. So hopefully it'll work on those. If not I will have to buy some kind of upscaling gizmo and connect it to the VGA port.


@alxlab
I vectorized your logo idea and I do like it a lot:
1650626179550.png


It's not quite compatible with the current font though:
Screen Shot 2022-04-22 at 7.15.34 AM.png

Hmm I will have to look for another font.
 
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Trash80toG4

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Yeah, it’s to run the Mac outside of the case so as to hook the system up to a logic analyzer more easily and also to do production testing of the accelerator.
Very cool, what's the video output refresh spec? Plays well with multisyncs or 60Hz VGA?

ISTR an available Molex assembly that can be clipped and hardwired to the adapter at a convenient length rather than setting up to use the stubby stock harness?

Gotta get my hands on one of those puppies. :)

Use roundish Resistor and squarish Zener axials on the lines and that logo would be perfect to my eyes. ;)
 
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